In a previous post we described Power Supply Rejection Ratio (PSRR) and discussed the ways it can impact an oscillators performance. In this update one of the ways we approach measuring PSRR on our devices.
Figure 1 shows the test setup used to measure the power supply rejection response for timing products. The setup includes a function generator providing power, an oscilloscope, a device under test (DUT), an amplifier, and a signal analyzer. The function generator is set to output a sine wave with an offset equal to the DUT’s operating voltage, and amplitude of 120mVpp to simulate the signal source noise. An amplifier (differential amplifier if the DUT has a dual output) is used in order to act as a buffer, rejecting the common-mode interference allowing us to isolate only the phase response. Together, this equipment forms the basis for measuring the ripple sensitivity of a timing IC.
Relative power is expressed in decibels (dB) relative to the output frequency (carrier) with unitsces the full effect of the ripple. The oscilloscope is used to monitor the output of the function generator to verify that the DUT is receiving the appropriate voltage input.
The phase noise (i.e., jitter) is convoluted with amplitude noise and must be separated. As stated above, the receiving amplifier removes most of the amplitude noise and interference, allowing us to assume that the measured side-band spurs can be attributed entirely to phase jitter. This allows a direct measurement of the RMS jitter induced by the ripple source. The following equation shows the relationship between side-band relative power (x) and RMS jitter.
Two different oscillators were subjected to the same test conditions as described above. Each DUT has an LVPECL output and share the following specifications: supply voltage, output frequency, frequency stability, operating temperature and even the same typical phase noise jitter. However, looking at Figure 2 we can clearly see that one has a much better PSR response than the other.
Here we have two ‘equivalent’ parts performing completely differently under the same test conditions. While DUT 1 shows a slight increase in additive jitter at supply ripple frequencies over 100kHz, we can see DUT 2 is significantly more effected by power supply ripple across the entire frequency range. If noise on the power supply is a concern for one’s application, DUT 2 would require additional filtering circuitry in order to compensate, whereas DUT 1 might be an easy fit. By performing this simple frequency test sweep, design engineers can easily evaluate which device is best for their system.